JPH0127609B2 - - Google Patents

Info

Publication number
JPH0127609B2
JPH0127609B2 JP54144178A JP14417879A JPH0127609B2 JP H0127609 B2 JPH0127609 B2 JP H0127609B2 JP 54144178 A JP54144178 A JP 54144178A JP 14417879 A JP14417879 A JP 14417879A JP H0127609 B2 JPH0127609 B2 JP H0127609B2
Authority
JP
Japan
Prior art keywords
output
circuit
input
logic
level
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP54144178A
Other languages
English (en)
Japanese (ja)
Other versions
JPS5668030A (en
Inventor
Yasuo Akatsuka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Co Ltd filed Critical Nippon Electric Co Ltd
Priority to JP14417879A priority Critical patent/JPS5668030A/ja
Priority to US06/139,595 priority patent/US4337525A/en
Priority to EP80102068A priority patent/EP0017990B1/en
Priority to DE8080102068T priority patent/DE3070410D1/de
Publication of JPS5668030A publication Critical patent/JPS5668030A/ja
Publication of JPH0127609B2 publication Critical patent/JPH0127609B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/003Modifications for increasing the reliability for protection

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Logic Circuits (AREA)
  • Manipulation Of Pulses (AREA)
  • Measurement Of Current Or Voltage (AREA)
  • Static Random-Access Memory (AREA)
JP14417879A 1979-04-17 1979-11-07 Logic circuit Granted JPS5668030A (en)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP14417879A JPS5668030A (en) 1979-11-07 1979-11-07 Logic circuit
US06/139,595 US4337525A (en) 1979-04-17 1980-04-11 Asynchronous circuit responsive to changes in logic level
EP80102068A EP0017990B1 (en) 1979-04-17 1980-04-17 Integrated memory circuit
DE8080102068T DE3070410D1 (en) 1979-04-17 1980-04-17 Integrated memory circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14417879A JPS5668030A (en) 1979-11-07 1979-11-07 Logic circuit

Publications (2)

Publication Number Publication Date
JPS5668030A JPS5668030A (en) 1981-06-08
JPH0127609B2 true JPH0127609B2 (en]) 1989-05-30

Family

ID=15356008

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14417879A Granted JPS5668030A (en) 1979-04-17 1979-11-07 Logic circuit

Country Status (1)

Country Link
JP (1) JPS5668030A (en])

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5952492A (ja) * 1982-09-17 1984-03-27 Fujitsu Ltd スタテイツク型半導体記憶装置
JPS62165785A (ja) * 1986-01-17 1987-07-22 Mitsubishi Electric Corp 半導体記憶装置

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5941609B2 (ja) * 1977-08-29 1984-10-08 株式会社東芝 相補mos回路装置

Also Published As

Publication number Publication date
JPS5668030A (en) 1981-06-08

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